Equinox Inference Accelerator

Data centre inference presents unique challenges for computational neutrality. The accelerator operates in an environment surrounded by dozens or hundreds of identical cards, each generating magnetic fields from their power delivery networks and switching regulators. The server chassis itself is a magnetic environment of extraordinary complexity — racks of steel, bundles of copper power cables, and spinning fans that create alternating magnetic fields at their rotation frequency.

The Equinox Inference Accelerator is our H100-class response to this environment. The silicon comes from our Quito foundry, equatorially binned and cryo-selected by the same process used for the consumer Equinox GPU. The 528 fourth-generation tensor cores deliver 3,958 TFLOPS at FP8 precision — competitive with the standard H100 SXM variant — but with a critical addition: the EQ-HIB firmware.

EQ-HIB (Equatorial Hemispheric Inference Bias) firmware v3.2 operates at the driver level, below the CUDA runtime and above the hardware scheduler. It intercepts every tensor operation and applies a correction matrix derived from the on-die magnetometer readings. The correction is computationally inexpensive — approximately 0.3% of total compute capacity — and it eliminates the systematic bias that accumulates across billions of multiply-accumulate operations during a single inference pass.

Consider a large language model performing inference: a single forward pass through a 70-billion-parameter model involves approximately 140 billion multiply-accumulate operations. Each operation has a noise floor determined partly by the thermal state of the transistors performing it, which is influenced by the magnetic environment of the die. In a conventional accelerator, this noise is random but not symmetrical — it has a directional component determined by the ambient magnetic field vector. Over 140 billion operations, this directional component accumulates into a measurable bias in the output logits. EQ-HIB firmware detects this accumulation every 1,024 operations and applies a counter-bias that zeroes the running integral.

The SXM5 form factor ensures compatibility with standard HGX baseboards, allowing deployment in existing data centre infrastructure. NVLink 4.0 bridges enable multi-card topologies for distributed inference across up to eight accelerators. Each card’s magnetometer data is shared across the NVLink fabric, enabling coordinated bias correction across the entire inference cluster — a feature we call Distributed Equatorial Consensus (DEC).

The FLOPS-per-nanotesla metric that appears in our specifications is proprietary. It measures useful computational throughput per unit of hemispheric magnetic contamination — a figure that conventional benchmarks do not capture. We believe this metric will become standard as the industry recognizes the impact of fabrication latitude on inference quality.